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 19-3988; Rev 2; 7/09
Dual, 10-Bit, Current-Sink Output DAC
General Description
The MAX5547 dual, 10-bit, dual range, digital-to-analog converter (DAC) sinks up to 3.6mA of current, making it ideal for laser-driver-control applications. Parallel the MAX5547 outputs to sink higher current (up to 7.2mA max). Operating from a single +2.7V to +5.25V supply, the MAX5547 typically consumes 1mA (internal reference). The MAX5547 operates from a precision +2.5V internal 4ppm/C reference or an external reference in the +2.45V to +2.55V range. The maximum full-scale current-sink range is software programmable to 3.6mA or 1.2mA for each DAC. A 10MHz SPITM-compatible serial interface configures the device. The MAX5547 is available in a 3mm x 3mm x 0.8mm 8pin TDFN package and is specified over the -40C to +85C extended temperature range. o Dual Current-Sink DACs o 10-Bit Resolution o Two Software-Programmable Full-Scale Current Ranges: 3.6mA or 1.2mA o Parallelable Outputs for Up to 7.2mA (max) o +2.5V Internal Reference Drifts Only 4ppm/C o +2.7V to +5.25V Single-Supply Operation o INL: 1 LSB o DNL: 0.75 LSB (Guaranteed Monotonic) o Low +0.8V Output Compliance o Ultra-Small, 3mm x 3mm x 0.8mm, 8-Pin TDFN Package
Features
MAX5547
Ordering Information
PART TEMP RANGE PIN-PACKAGE TOP MARK APF
Applications
Laser-Driver Control Pin-Diode Bias Currents Modulation Currents Average Power Extinction Ratios
MAX5547ETA+ -40C to +85C 8 TDFN-EP*
*EP = Exposed pad. +Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
+2.5V +2.7V TO +5.25V +3.3V +3.3V
REF
VDD I OUTA MODSET
VCC
OUT-
MAX5547
MAX3736
OUT+
I OUTB BIASSET
BIAS FERRITE BEAD DIS BC_MON
CS
DIN
SCLK
GND
GND +3.3V
CS REF GND
MOSI
SCLK
VCC AIN0 AIN1 AIN2 +3.3V
MICROCONTROLLER WITH ADC I/O2 I/O3
I/O1
TX_DISABLE MOD-DEF1 MOD-DEF2
SPI is a trademark of Motorola, Inc.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual, 10-Bit, Current-Sink Output DAC MAX5547
ABSOLUTE MAXIMUM RATINGS
VDD to GND .............................................................-0.3V to +6V OUTA, OUTB, REF to GND ........................-0.3V to (VDD + 0.3V) SCLK, DIN, CS to GND ............................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) 8-Pin TDFN (derate 18.2mW/C above +70C) .......1454.5mW Operating Temperature Range ...........................-40C to +85C Junction Temperature .....................................................+150C Storage Temperature Range ............................-65C to +150C Lead Temperature (soldering, 10s) ................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7 to +5.25V, VGND = 0V, external reference = +2.5V, output voltage = +2.0V, TA = -40C to +85C. Typical values are at VDD = +3.0V, and TA = +25C.) (Note 1)
PARAMETER Resolution Integral Nonlinearity (Note 2) Differential Nonlinearity Offset Error Offset Temperature Coefficent Gain Error Gain Temperature Coefficient Line Regulation Output Crosstalk REFERENCE Internal-Reference Voltage Internal-Reference Temperature Coefficient Internal-Reference Load Regulation Internal-Reference Power-Up Time Internal-Reference Sink Current Internal-Reference Source Current REF Capacitive Load Reference Line Regulation Internal-Reference Noise External-Reference Range VREF (Note 4) VDD = +2.7V to +5.25V f = 0.1Hz to 10Hz f = 10Hz to 10kHz 2.45 0.1 25 10 27 2.55 VREF TA = +25C (Note 4) 0A < IREF < +300A CREF = 1F, to 0.05% 2.48 2.5 4 1 0.55 50 300 10.0 2.52 30 3.5 V ppm/C ms A A F V/V VRMS V GE INL DNL OE IOUT_ = 1.2mA IOUT_ = 3.6mA Guaranteed monotonic Code = 030h, TA = +25C (Note 3) Measured from code 030h to 3FFh IOUT_ = 1.2mA IOUT_ = 3.6mA VDD = +2.7V to +5.25V OUTA = midscale, OUTB switching from 030h to 3FFh 54 IOUT = 1.2mA IOUT = 3.6mA 0.05 0.1 0.1 15 25 0.8 SYMBOL CONDITIONS MIN 10 1 1 6 6 0.75 9 0.15 3 5.5 TYP MAX UNITS Bits LSB LSB LSB LSB/C % ppm/C LSB/V dB
STATIC PERFORMANCE--ANALOG SECTION
2
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7 to +5.25V, VGND = 0V, external reference = +2.5V, output voltage = +2.0V, TA = -40C to +85C. Typical values are at VDD = +3.0V, and TA = +25C.) (Note 1)
PARAMETER External-Reference Input Impedance DAC OUTPUTS 1.2mA low-current range Output Current (Note 5) IOUT_ 3.6mA high-current range 1.2mA full-scale current 3.6mA full-scale current IOUT_ = full-scale (Note 6) IOUT_ = 1.2mA, VOUT = +1V to +5.25V IOUT_ = 3.6mA, VOUT = +1V to +5.25V tS IRMS To 1% (Note 7) f = 0.1Hz to 10Hz f = 10Hz to 10kHz 100mV, 1kHz signal added to VDD RLOAD = 500, CLOAD = 100pF RLOAD = 500, CLOAD = 100pF 0.8 600 180 10 0.05 0.35 0.85 2 16 2 Code = 030h Code = 3FFh Code = 030h Code = 3FFh 3400 1170 50 1200 150 3600 1.17 3.52 3800 A V k 1230 A SYMBOL RREF CONDITIONS MIN TYP 90 MAX UNITS k
MAX5547
LSB Size Current-Source Compliance Voltage Range Output Impedance at Full-Scale Current DYNAMIC PERFORMANCE Settling Time Output Noise Supply Feedthrough Digital Feedthrough Digital-to-Analog Glitch Impulse DAC-to-DAC Full-Scale Current Matching POWER SUPPLIES Supply Voltage VDD IDD
s LSBRMS LSB/V pA*s pA*s %
+2.70 VDD = +5.25V, no load, SCLK not switching Internal reference mode External reference mode 0.7 x VDD 1.1 0.75
+5.25 2
V
Supply Current
mA 1.5
LOGIC AND CONTROL INPUTS Input High Voltage Input Low Voltage Input Hysteresis Input Capacitance Input Leakage Current VIH VIL VHYS CIN IIN (Note 8) (Note 8) 0.05 x VDD 10 1 V 0.8 V V pF A
_______________________________________________________________________________________
3
Dual, 10-Bit, Current-Sink Output DAC MAX5547
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7 to +5.25V, VGND = 0V, external reference = +2.5V, output voltage = +2.0V, TA = -40C to +85C. Typical values are at VDD = +3.0V, and TA = +25C.) (Note 1)
PARAMETER SCLK Clock Period SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall to SCLK Fall Setup Time SCLK Fall to CS Rise Hold Time DIN to SCLK Fall Setup Time DIN to SCLK Fall Hold Time CS Pulse-Width High SYMBOL tCP tCH tCL tCSS tCSH tDS tDH tCSW CONDITIONS MIN 100 40 40 25 50 40 0 100 TYP MAX UNITS ns ns ns ns ns ns ns ns SPI TIMING CHARACTERISTICS (see Figure 1)
Note 1: Note 2: Note 3: Note 4: Note 5:
Devices are 100% production tested at TA = +25C. Limits over temperature are guaranteed by design. INL linearity is from code 48 to code 1023. Specification based on characterization data. Not production tested. Guaranteed by design. Not production tested. The DACs continue to operate at currents lower than 50A on the 1.2mA range and 150A on the 3.6mA range. However, performance is not guaranteed at these low currents. A code of all zeros has a nominal output current of 0A. Note 6: Compliance voltage range is defined as the range where the output current is -2 LSB of its value at VOUT = +1V. Note 7: Settling time is measured from 0.25 x full scale to 0.75 x full scale. Note 8: The device draws higher supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND + 0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics.
Typical Operating Characteristics
(VDD = +3.0V, VGND = 0V, external reference = +2.5V, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (1.2mA SETTING)
MAX5547 toc01
INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (3.6mA SETTING)
3 2 DNL (LSB) INL (LSB) 1 0 -1 -2 -3 -4
MAX5547 toc02
DIFFERENTIAL NONLINEARITY vs. DIGITAL INPUT CODE (1.2mA SETTING)
0.75 0.50 0.25 0 -0.25 -0.50 -0.75 -1.00
MAX5547 toc03
4 3 2 INL (LSB) 1 0 -1 -2 -3 -4 0 256 512 768
4
1.00
1024
0
256
512
768
1024
0
256
512
768
1024
DIGITAL INPUT CODE
DIGITAL INPUT CODE
DIGITAL INPUT CODE
4
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
Typical Operating Characteristics (continued)
(VDD = +3.0V, VGND = 0V, external reference = +2.5V, TA = +25C, unless otherwise noted.)
DIFFERENTIAL NONLINEARITY vs. DIGITAL INPUT CODE (3.6mA SETTING)
0.75 0.50 DNL (LSB) INL (LSB) 0.25 0 -0.25 -0.50 -0.75 -1.00 0 256 512 768 1024 DIGITAL INPUT CODE -2 -40 -15 10 35 60 85 TEMPERATURE (C) -1 0.1 0 -40 -15 10 35 60 85 TEMPERATURE (C)
MAX5547 toc04
MAX5547
MAXIMUM INTEGRAL NONLINEARITY vs. TEMPERATURE (3.6mA SETTING)
MAX5547 toc05
MAXIMUM DIFFERENTIAL NONLINEARITY vs. TEMPERATURE (3.6mA SETTING)
MAX5547 toc06
1.00
2
0.6 0.5 0.4 DNL (LSB)
1
0
0.3 0.2
ZERO-SCALE SINK CURRENT vs. TEMPERATURE
MAX5547 toc07
FULL-SCALE SINK CURRENT vs. TEMPERATURE (1.2mA SETTING)
MAX5547 toc08
FULL-SCALE SINK CURRENT vs. TEMPERATURE (3.6mA SETTING)
MAX5547 toc09
20
1.210 1.208 FULL-SCALE CURRENT (mA) 1.206 1.204 1.202 1.200 1.198
3.80 3.75 3.70 3.65 3.60 3.55 3.50
ZERO-SCALE CURRENT (A)
15
10
5
1.2mA FULL SCALE
0 -40 -15 10 35 60 85 TEMPERATURE (C)
1.196 -40 -15 10 35 60 85 TEMPERATURE (C)
FULL-SCALE CURRENT (mA)
3.6mA FULL SCALE
-40
-15
10
35
60
85
TEMPERATURE (C)
INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE
MAX5547 toc10
INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE
MAX5547 toc11
SUPPLY CURRENT vs. SUPPLY VOLTAGE
EXTERNAL REFERENCE = 2.5V, CS = SCLK = DIN = GND
MAX5547 toc12
2.4960 INTERNAL REFERENCE VOLTAGE (V)
2.4940 INTERNAL REFERENCE VOLTAGE (V)
502 500 498 IDD (A)
2.4958
2.4935
2.4956
2.4930
496 494
2.4954
2.4925 492 2.4920 490 -40 -15 10 35 60 85 2.5 3.0 3.5 4.0 4.5 5.0 5.5 TEMPERATURE (C) SUPPLY VOLTAGE (V)
2.4952
2.4950 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
Dual, 10-Bit, Current-Sink Output DAC MAX5547
Typical Operating Characteristics (continued)
(VDD = +3.0V, VGND = 0V, external reference = +2.5V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5547 toc13
SUPPLY CURRENT vs. TEMPERATURE
MAX5547 toc14
IOUT vs. VOUT (1.2mA SETTING)
VDD = 5.25V 1.215 TA = +85C 1.210 IOUT_ (mA) 1.205 1.200 TA = -40C TA = +25C
MAX5547 toc15
1.12 INTERNAL REFERENCE, CS = SCLK = DIN = GND 1.11 IDD (mA)
1.2
1.220
1.0 INTERNAL REFERENCE IDD (mA)
1.10
0.8
1.09
0.6
EXTERNAL REFERENCE 1.195
1.08 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
0.4 -40 -15 10 35 60 85 TEMPERATURE (C)
1.190 0 1 2 3 4 5 6 OUTPUT VOLTAGE (V)
IOUT vs. VOUT (3.6mA SETTING)
MAX5547 toc16
SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE
CS, DIN, SCLK SHORTED TOGETHER
MAX5547 toc17
OUTPUT NOISE vs. FREQUENCY
MAX5547 toc18
3.80 3.75 3.70 IOUT_ (mA) 3.65 3.60 3.55 3.50 0
VDD = 5.25V TA = +85C
10,000
0.10
0.08 NOISE (LSBRMS/Hz)
VDD = 5.25V TA = +25C IDD (A) 1000
0.06
0.04
TA = -40C 100 1 2 3 4 5 6 0 1
VDD = 3V
0.02
2
3
4
5
6
0 0.01 0.1 1 10 FREQUENCY (kHz)
OUTPUT VOLTAGE (V)
DIGITAL INPUT VOLTAGE (V)
SETTLING TIME (FULL-SCALE POSITIVE STEP) (IOUT = 1.2mA)
MAX5547 toc19
SETTLING TIME (FULL-SCALE POSITIVE STEP) (IOUT = 3.6mA)
MAX5547 toc20
SETTLING TIME (FULL-SCALE NEGATIVE STEP) (IOUT = 1.2mA)
MAX5547 toc21
15
16
SCLK 2V/div GND 3V OUT_ 500mV/div
15
16
SCLK 2V/div GND 3V OUT_ 500mV/div
15
16
SCLK 2V/div GND 3V OUT_ 500mV/div
VPULLUP = 3V, ROUT = 500, COUT = 10pF 1.00s/div
VPULLUP = 3V, ROUT = 500, COUT = 10pF 1.00s/div
VPULLUP = 3V, ROUT = 500, COUT = 10pF 1.00s/div
6
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
Typical Operating Characteristics (continued)
(VDD = +3.0V, VGND = 0V, external reference = +2.5V, TA = +25C, unless otherwise noted.)
SETTLING TIME (FULL-SCALE NEGATIVE STEP) (IOUT = 3.6mA) SETTLING TIME (HALF-SCALE POSITIVE STEP) (IOUT = 1.2mA) SETTLING TIME (HALF-SCALE NEGATIVE STEP) (IOUT = 1.2mA)
MAX5547
MAX5547 toc22
MAX5547 toc23
MAX5547 toc24
15
16
SCLK 2V/div GND 3V
15
16
SCLK 2V/div GND
15
16
SCLK 2V/div GND OUT_ 200mV/div
VPULLUP = 3V, ROUT = 500, COUT = 10pF 1.00s/div
OUT_ 500mV/div VPULLUP = 3V, ROUT = 500, COUT = 10pF, CODE = 0.25 x FS TO 0.75 x FS 1.00s/div
OUT_ 200mV/div VPULLUP = 3V, ROUT = 500, COUT = 10pF, CODE = 0.75 x FS TO 0.25 x FS 1.00s/div
INTERNAL REFERENCE POWER-UP
SUPPLY FEEDTHROUGH vs. TEMPERATURE
MAX5547 toc25
GLITCH IMPULSE (MAJOR CARRY TRANSITION) (IOUT = 3.6mA)
MAX5547 toc26
0.5 0.4 SUPPLY FEEDTHROUGH (LSB/V) SCLK 2V/div GND 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -40 -15 10 35 60 TWO TYPICAL PARTS, IFS = 1.2mA, VDD = 5V, 100mV, 1kHz SIGNAL ADDED TO VDD
MAX5547 toc27
14 15 16
OUT_ AC-COUPLED 2mV/div
REF 1V/div GND CREF = 1F 100s/div
VPULLUP = 3V, ROUT = 500, COUT = 100pF, CODE = 1FFh TO 200h 85 10s/div
TEMPERATURE (C)
INTERNAL REFERENCE NOISE (0.1Hz TO 10Hz)
MAX5547 toc28
OUTPUT NOISE (0.1Hz TO 10Hz)
MAX5547 toc29
500 TO 3V 3.6mA RANGE CODE = 3FFh
REF 20V/div
OUT_ 50V/div
1.00s/div
1.00s/div
_______________________________________________________________________________________
7
Dual, 10-Bit, Current-Sink Output DAC MAX5547
Pin Description
PIN 1 2 3 4 5 6 7 8 -- NAME VDD CS SCLK DIN GND REF OUTB OUTA EP FUNCTION Supply Voltage. Set VDD between +2.7V to +5.25V. Bypass VDD with a 0.1F capacitor to GND, as close to the device as possible. Active-Low Chip-Select Input. Set CS low to enable the serial interface. Serial-Clock Input Serial-Data Input. DIN is clocked into the serial interface on the falling edge of SCLK. Ground External Reference Input/Internal Reference Output. When programmed for internal reference mode, REF is a +2.5V output. When programmed for external reference mode, apply a voltage between +2.45V and +2.55V (see Table 1). Connect a 1F ceramic capacitor from REF to GND, as close to the device as possible. DAC B Current Output. OUTB sinks up to 3.6mA. DAC A Current Output. OUTA sinks up to 3.6mA. Exposed Pad. Connect to GND. Do not use as the ground connection.
Detailed Description
The MAX5547 10-bit, dual-range, current-sink DAC operates with serial data clock rates up to 10MHz. The double-buffered DAC input consists of a 16-bit input register and two 10-bit DAC registers, followed by a current-steering array (see the Functional Diagram). The MAX5547 sinks full-scale output currents of 1.2mA or 3.6mA per DAC. Each DAC's full-scale current can be independently programmed. Operating from a single +2.7V to +5.25V supply, the MAX5547 typically consumes 1mA. The MAX5547 operates from an internal +2.5V reference or an external reference in the +2.45V to +2.55V range. The MAX5547 is ideal as the digital/analog interface for laser-diode drivers with current-controlled inputs, such as the MAX3736 (see the Typical Operating Circuit). Set the current levels at the MAX3736's MODSET and BIASSET current-controlled inputs from the MAX5547's DAC outputs. The MAX3736's MODSET and BIASSET lines set the laser driver's desired modulation and bias currents.
reference source in external reference mode. Bypass REF to GND with a ceramic capacitor in the 0.1F to 10F range, as close to the device as possible, in both internal and external reference modes. During startup, when power is first applied, the MAX5547 defaults to external reference mode, and to the 1.2mA full-scale current-range mode. Use software commands to select internal reference mode and 3.6mA full-scale current-range mode (see Table 1).
DAC Data
The MAX5547`s internal registers set the DAC full-scale output currents (IFS) to 1.2mA or 3.6mA (see Table 1). The 10-bit DAC data is decoded as straight binary, with 1 LSB = IFS / 1023, and converted into the corresponding current as shown in Table 2.
Serial Interface
The MAX5547 operates through a 3-wire, 10MHz SPIcompatible serial interface. CS, SCLK, and DIN control the serial interface timing and data. Ensure the SPI bus master, typically a microcontroller (C), runs in master mode so that it generates the serial clock signal. Select an SCLK frequency of 10MHz or less and set the clock polarity (CPOL) and phase (CPHA) in the C control registers to opposite values. The MAX5547 operates with SCLK idling high or low. Therefore, set CPOL = 0 and CPHA = 1, or CPOL = 1 and CPHA = 0.
Reference Architecture and Operation
The MAX5547 operates from an internal +2.5V reference or accepts an external reference voltage source between +2.45V and +2.55V. The internal reference is capable of sinking up to 50A and sourcing up to 300A. REF serves as the input for a low-impedance
8
_______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC MAX5547
CS
tCSW
tCSS SCLK tDS
tCL
tCH
tCP
tCSH
tDH DIN C3 C2 S1 S0
Figure 1. SPI Serial-Interface Timing Diagram
Set CS low to begin clocking input data at DIN on the falling edge of SCLK (see Figure 1). Serial communications to the shift register consist of a 16-bit command word loaded from DIN. The first four control bits (C3-C0) determine the target register (see Table 1). The next 10 data bits set the current-sink level. D9 is the MSB and D0 the LSB. Set bits S1 and S0 to zero for proper operation. Data is latched into the appropriate DAC register on the 16th SCLK falling edge. After writing 16 bits, drive CS high. Keep CS low throughout the entire 16-bit word. Write the command word to configure DAC registers A and B individually or both registers at the same time. The command word also determines whether the DACs use the internal or external reference. The MAX5547 powers up in external reference mode with DAC registers A and B set to IFS = 1.2mA at code 000h.
Applications Information
Power Sequencing
Ensure the voltages applied at REF, OUTA, and OUTB do not exceed V DD at any time. If proper power sequencing is not possible, connect an external Schottky diode between REF/OUTA/OUTB and VDD to ensure compliance with the absolute maximum ratings.
Power-Supply Bypassing and Ground Management
Digital or AC transient signals on GND create noise at the analog output. Return GND to the highest quality ground plane available. For extremely noisy environments, bypass both REF and VDD to GND with 10F and 0.1F capacitors in parallel, with the 0.1F capacitor as close to the device as possible. Careful PC board ground layout minimizes crosstalk between the DAC outputs and digital inputs.
_______________________________________________________________________________________
9
Dual, 10-Bit, Current-Sink Output DAC MAX5547
Table 1. Command Word Summary
CONTROL BITS C3 C2 C1 C0 MSB D9 D8 D7 D6 DATA BITS D5 D4 D3 D2 D1 LSB D0 S1 S0 External reference mode (default state). Connect an external voltage source at REF from +2.45V to +2.55V. Internal reference mode. Internal reference is +2.5V. Load DAC register A and set IOUTA full-scale range to 1.2mA. Load DAC register A and set IOUTA full-scale range to 3.6mA. Load DAC register B and set IOUTB full-scale range to 1.2mA. Load DAC register B and set IOUTB full-scale range to 3.6mA. Load DAC registers A and B and set IOUTA and IOUTB full-scale ranges to 1.2mA (default state). Load DAC registers A and B and set IOUTA and IOUTB ranges to 3.6mA. REGISTER FUNCTION
0
0
0
0
X
X
X
X
X
X
X
X
X
X
0
0
1 0 0 0 0
0 0 0 1 1
0 1 1 0 0
0 0 1 0 1
X
X
X
X
X
X
X
X
X
X
0 0 0 0 0
0 0 0 0 0
10-bit data 10-bit data 10-bit data 10-bit data
0
1
1
0
10-bit data
0
0
0
1
1
1
10-bit data
0
0
X = Don't care. Unused codes are reserved for factory use.
Table 2. Ideal DAC Output Code Table
BINARY DAC CODE 11 1111 1111 IOUT_
OUTA OUTB
Pin Configuration
TOP VIEW
REF GND
I 1023 x FS 1023 I 512 x FS 1023 IFS 1023
8
7
6
5
10 0000 0000
MAX5547
00 0000 0001 00 0000 0000
0
+
1 VDD
2 CS
3 SCLK
4 DIN
TDFN
10
______________________________________________________________________________________
Dual, 10-Bit, Current-Sink Output DAC
Functional Diagram
+2.5V +2.7V TO +5.25V
MAX5547
REF
VDD
+2.5V REFERENCE
MAX5547
DAC REGISTER A
DAC A 3.6mA/1.2mA FULL-SCALE CURRENT OUTA RANGE CONTROL
DAC REGISTER B SERIAL INTERFACE
DACB 3.6mA/1.2mA FULL-SCALE CURRENT OUTB RANGE CONTROL GND
CS
DIN
SCLK
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 8 TDFN-EP PACKAGE CODE T833+2 DOCUMENT NO. 21-0137
______________________________________________________________________________________
11
Dual, 10-Bit, Current-Sink Output DAC MAX5547
Revision History
REVISION NUMBER 2 REVISION DATE 7/09 DESCRIPTION Updated Electrical Characteristics table. Added lead-free note to Ordering Information. Updated IOUT_ and linearity information. PAGES CHANGED 1-5
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.


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